This paper presents a single-stage matrix-type solid-state transformer （SM-SST） with reduced switching tubes.In the proposed topology，the power-frequency full bridge shares filter capacitors with high-frequency （HF） half-bridges，which effectively reduces the number of switching tubes and capacitors.The adoption of electrolytic capacitorless matrix-type topology enhances the system ’s potential reliability and power density，achieves instantaneous power balance between the source and load，eliminates ripple power with double grid frequency，and enables inherent power factor correction （PFC） without the need for a current control loop.Additionally，this paper analyzes the zero voltage switching （ZVS） characteristics under time-varying DC bus voltages.As a result，the proposed SM-SST offers advantages of fewer components，lower power losses，and a higher power density.Finally，a 1 kW experimental prototype is constructed and tested to validate the accuracy and feasibility of the proposed method.